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# Project2. Fast Fouriour Transform accelerator IP for RISC-V core
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## Design objective:
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Design a 256 point FFT accelerator module for RISC-V, mounted on the ICB bus of Hummingbird E203.
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## Basic technical requirements:
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- 1.The input data stream (time series data, length=256) can be 32-bit fixed-point format;
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- 2.The input data can be pre-loaded into RAM with your program. Check your simulation waveform to verify the correctness of FFT process.
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- 3.The time of calculation(256 points FFT) should be less than 1ms.
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- 4. You can use Gowin's IP to implement FFT calculation.
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## Extended requirements (bonus points):
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- 1. Design a timer in your SoC for counting the time of calculation;
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- 2. Transfer input data and output result through UART.
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- 3. Design the FFT module from scratch. Multipliers for FFT calculation can use hardwired MAC macroblock, which is provided by FPGA.
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## Verification methodology
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- 1. For basic requirements, Matlab can be used to generate a signal(time series data) with specific harmonic components, and then import the data into SoC. The frequency domain sequence generated by Matlab's built-in FFT function can be used as reference data to compare with the calculation results done by your SoC;
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- 2. Show your simulation waveforms of IP For the verification of basic technical requirements.
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## Other requirements
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The content of submission should include:
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- Project report:
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- description of interfaces
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- detailed implementation of core modules
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- simulation waveforms
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- explanations of key modules
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- testing methods and processes
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- references
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If you have done extension task3(FFT from scratch), please describe the detailed FFT calculation principles.
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## Scoring criteria
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Total scores:100
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| Item | Seq | Requirements | Score | remark |
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| -- | -- | -- | -- | -- |
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| | 1 | Can achieve 256-pt FFT calculation | 50 | |
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| | 2 | Calculation time less than 1ms | 10 | |
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