PRJ2.FFT.md

@@ -11,12 +11,17 @@ Design a 256 point FFT accelerator module for RISC-V, mounted on the ICB bus of
 - 3.The time of calculation(256 points FFT) should be less than 1ms.
 - 4. You can use Gowin's IP to implement FFT calculation.
 
+**NOTE: You can choose to implement your design in simulation environment or on FPGA board. But these two ways will get different score.**
+
 ## Extended requirements (bonus points):
 
 - 1. Design a timer in your SoC for counting the time of calculation;
 - 2. Transfer input data and output result through UART.
 - 3. Design the FFT module from scratch. Multipliers for FFT calculation can use hardwired MAC macroblock, which is provided by FPGA.
 
+**NOTE: These tasks must be achieved on FPGA board. **
+
+
 ## Verification methodology
 
 - 1. For basic requirements, Matlab can be used to generate a signal(time series data) with specific harmonic components, and then import the data into SoC. The frequency domain sequence generated by Matlab's built-in FFT function can be used as reference data to compare with the calculation results done by your SoC; 
@@ -44,15 +49,16 @@ Total scores:100 + 20
 | Item | Seq | Requirements | Score | remark |
 | -- | -- | -- | -- | -- |
 | Basic Requirements | 1  | Can achieve 256-pt FFT calculation | 50 |  |
-| | 2  | Calculation time less than 1ms | 20 | |
-|  |  |  |  |  |
-| Extended Requirements| 3  | Implement a timer for performance metric | 5 | |
-| | 4  | Implement data exchange through UART | 5 | |
-|    | 5  | Implement FFT from scratch | 10 | |
+| | 2  | Calculation time less than 1ms | 10 | |
+| | 3  | Your design can run on FPGA board| 10 | |
+| | 
+| Extended Requirements| 4  | Implement a timer for performance metric | 5 | |
+| | 5  | Implement data exchange through UART | 5 | |
+| | 6  | Implement FFT from scratch | 10 | |
 | |
-| documentary | 6  | The content of report is complete | 10 | |
-| | 7  | Detailed test plan, data is complete | 10 | |
-| | 8  | code is complete, with sufficient explain | 10 | |
+| documentary | 7  | The content of report is complete | 10 | |
+| | 8  | Detailed test plan, data is complete | 10 | |
+| | 9  | code is complete, with sufficient explain | 10 | |
 
 ## Reference